openarty by ZipCPU

An Open Source configuration of the Arty platform


The purpose of the OpenArty project is to implement a ZipCPU on an Arty platform, together with open source drivers for all of the Arty peripherals. In my case, that will include drivers for additional PMods that I have purchased for the project. Hence the OpenArty platform with support:

  1. Generic flash driver, to include access to all of the flash's functionality such as being able to read its ID as well as being able to read and set the one time programmable memory. This in addition to being flash manufacturer agnostic. Further, when complete, a ZipCPU will launch code automatically from the flash on startup.
  2. DDR3 SDRAM (Done)
  3. The Internal Configuration Access Port (ICAPE2), to allow for dynamic (not partial) reconfiguration (Done)
  4. Ethernet (Done)
  5. SD Card. The program currently uses the SDSPI controller, although I intend to upgrade to a full SDIO controller with (hopefully) the same identical or nearly identical interface.
  6. OLEDrgb display. (Done)
  7. GPS clock module, and external USB-UART. (Done)
  8. This leaves one open PMOD port which ... I haven't decided what to connect it to.

As a demonstration project, I'd love to implement an NTP server within the device. This is a long term goal, however, and a lot needs to be accomplished before I can get there. Still, a $130 NTP server isn't a bad price for an NTP server in your lab. ($99 for the Arty, $25 for the GPS receiver IIRC)

Current Status

This version of the OpenArty project is built around AutoFPGA. It is designed to be highly reconfigurable, so that you can add (or remove) peripherals quickly and easily. My specific goal is to use AutoFPGA to create a project that doesn't require all of the peripherals I've used, but may be instead built with only those peripherals on the board.


Due to the ongoing issues with OpenCores, the official OpenArty repository is being kept on GitHub, under the ZipCPU username.


Gisselquist Technology, LLC, is pleased to provide you with this entire OpenArty project under the GPLv3 license. If this doesn't work for you, please feel free to contact me.

Project Meta

  • Registered on LibreCores 5 years ago
  • Project started 5 years ago
  • Last commit 1 year ago



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{"labels":["Others","Verilog-SystemVerilog","C++","C\/C++ Header","C","make","Bourne Shell"],"series":[19,82,39,32,20,7,6]}

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Data Sheet
Last activity 1 year ago
Primary language: Verilog-SystemVerilog
5 forks
2 watchers
13 stars
398 commits by 4 contributors
ZipCPU Me Chris Drake Dan Gisselquist

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LibreCores data updated 1 year ago