verilog-lfsr by alexforencich

Fully parametrizable combinatorial parallel LFSR/CRC module

Verilog LFSR Readme

For more information and updates: http://alexforencich.com/wiki/en/verilog/lfsr/start

GitHub repository: https://github.com/alexforencich/verilog-lfsr

Introduction

Fully parametrizable combinatorial parallel LFSR/CRC module. Implements an unrolled LFSR next state computation. Includes full MyHDL testbench.

Documentation

lfsr module

Fully parametrizable combinatorial parallel LFSR/CRC module. Implements an unrolled LFSR next state computation.

lfsr_crc module

Wrapper for lfsr module for standard CRC computation.

lfsr_descramble module

Wrapper for lfsr module for self-synchronizing descrambler.

lfsr_prbs_check module

Wrapper for lfsr module for standard PRBS check.

lfsr_prbs_gen module

Wrapper for lfsr module for standard PRBS computation.

lfsr_scramble module

Wrapper for lfsr module for self-synchronizing scrambler.

Source Files

lfsr.v             : Parametrizable combinatorial LFSR/CRC module
lfsr_crc.v         : Parametrizable CRC computation wrapper
lfsr_descramble.v  : Parametrizable LFSR self-synchronizing descrambler
lfsr_prbs_check.v  : Parametrizable PRBS checker wrapper
lfsr_prbs_gen.v    : Parametrizable PRBS generator wrapper
lfsr_scramble.v    : Parametrizable LFSR self-synchronizing scrambler

Testing

Running the included testbenches requires MyHDL and Icarus Verilog. Make sure that myhdl.vpi is installed properly for cosimulation to work correctly. The testbenches can be run with a Python test runner like nose or py.test, or the individual test scripts can be run with python directly.

Copyright (c) 2016 Alex Forencich

Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.

Project Meta

  • Registered 2 months ago
  • Started 3 years ago
  • Last commit 1 year ago

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https://github.com/alexforencich/verilog-lfsr.git
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Last updated 1 year ago
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Alex Forencich

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