fejkon by bluecmd
fejkon is a basic host bus adapter (HBA) for Fibre Channel (and thus, FICON) implemented on the DE5-Net board. The aim is to provide easy access to add or consume Fibre Channel services, such as FCP or FICON from an ordinary server.
Fejkon, which was born out of the need for a fake FICON HBA, is a Swedish pun playing on the word "fejk" which translates "fake". It is pronounced similarly to the "FIC" in "FICON".
In the past there existed a commerical product called FLEXCUB that seems to have done something similar for ESCON.
The overall system design is as shown below. Using quad SFP+ ports Fejkon is configured to communicate using 8GFC (no speed negotiation will be implemented).
8G Fibre Channel +-----------+ | FC Port 0 +<-------------------------------+ +-----+-----+ | ^ | | (Optional) Traffic Bridging | v | +-----+-----+ | | FC Port 1 +<--------+ v +-----------+ | +-------------+--------------+ +------->+ | +----------------+ +-----------+ | | | | | FC Port 2 +<---------------->+ Packet Stream +<------>+ PCIe 3.0 x8 | +-----------+ | Input/Output Mux/Demux | | | +------->+ | +----------------+ +-----------+ | | | | FC Port 3 +<--------+ +----------------------------+ +-----------+
Target board right now is the DE5-Net from Terasic. They are available for $300 - $600 on eBay as of this writing and are capable of implementing 4x 8 Gbit/s Fibre Channel ports on a PCIe Gen 3 x8 port.
There are a few modifications to the board that are recommended.
- Remove DDR3 SODIMMs, they are not needed and contribute to power drain
- Add a heatsink onto of the LTM4601V
Configuring and Building
FPGA tooling can be a bit stuborn to work with, and if you do not have an FPGA background you might not want to use them.
Fejkon uses Kconfig menu configuration for configuring the board features, and can be configured and built like this:
$ pip3 install kconfiglib # Required build dependency $ make menuconfig # Optional: Change configuration $ make
The configuration interface looks like this:
Hopefully the card is straight forward to use, but every product needs a manual. This is it.
The leds on the front of the card next to the RJ45 port signals when the port is considered active. This means for FC that the port state machine has entered the ACTIVE state.
The leds next to the four switches on the board indicate if the transmit laser is activated.
The leds next to the SFP cages indicate whether or not an SFP module is detected in that slot.
The fan is configured to only turn on when the temperature reaches 60°C. If that happens the fan will remain on until the board has been reset.
Wireshark / tcpdump
libpcap defaults to DLT_FC2 which does not account for SOF/EOF which are included in fejkon - so you need to tell it that those are included.
tshark -i fc0 -y FC_2_WITH_FRAME_DELIMS
Currently fejkon is using multiple MSI interrupts, not MSI-X. MSI-X is a bit more complicated to implement, and the benefits of MSI-X over MSI isn't very documented when you don't need the thousands interrupts that MSI-X offers.
During development it was discovered that e.g. QEMU does not do multiple MSI
interrupts by default, and some kernel options are needed as well. The symptom
of the platform not being setup correctly is that
pci_alloc_irq_vectors(pcidev, 1, irqs, PCI_IRQ_ALL_TYPES); only returns one
available vector instead of the requested number. There appears to be other
people that have ran into the
In the kernel this support for multiple MSI interrupts seems to be gated by
To enable the kernel support, enable
CONFIG_IRQ_REMAP. On Intel, you should
see mentions of
DMAR in your dmesg. This is usually enabled by enabling VT-d.
The equivalent on AMD seems to be just IOMMU support, but that has not been verified.
PCIe hotplug has been known to cause issues, so you might want to disable that.
The configuration for QEMU is something like:
-machine q35,kernel-irqchip=split \ -device intel-iommu,intremap=on,device-iotlb=on \
Since the card only uses MSI interrupts, legacy interrupts are disabled.
So if you are designing something from scratch and have the option to use MSI or MSI-X, this information above should tell you that maybe using MSI-X will be easier. However, it is quite likely MSI-X has its own pitfalls.
SFP Diagnostics Data
Fejkon exposes the I2C interfaces through the Linux kernel's native I2C interface. This means that accessing the SFP diagnostics data is possible using any standard I2C library.
The recommended way to browse SFP data is using
Safaripark, but there is also a
simple CLI tool located in
The recommended flow is using Quartus Platform Designer to make changes.
To build the qsys files needed simply execute
make QPATH=/path/to/quartus in the root directory.
Then use platform designer to edit
When you are done, export the system
using "Export System as Platform Designer script (.tcl)" under the "File" menu. If you
have updated any subsystems you need to this for those systems as well.
Finally review any changes to the *.tcl files and commit them if they look reasonable.
To run the tests first install the dependencies:
$ sudo apt install iverilog gtkwave verilator myhdl-cosimulation python3-myhdl $ cd /usr/share/myhdl/cosimulation/icarus $ sudo make $ sudo cp myhdl.vpi /usr/lib/x86_64-linux-gnu/ivl/
Then to execute all tests run:
$ make -j test
NOTE: The driver tests are located under
driver and are not automatically run.
The board uses vendor/device ID
f1c0:0de5. Mnemonic is FICOn DE5-net.
The PCIe endpoint has one Base Address Register (BAR).
Avalon-St Avalon-MM +-------------------+ +----------------> BAR 0 | | | | v | | +-------+------+--------+ | | | | | Fejkon PCIe Data +<------+ Packet Data DMA +--+--+ | Facility +-------> TX/RX Avalon-St | | | | | A | +---+-------+-------+---+ | | | | | | D | v v v +----------------------+ | | +--+--+-+--+--+-+--+--+ | | | A | | | | | | | | +------->+ | | F | | F | | F | 3 TLP streams: | Intel PCIe Core | | P | | I | | I | | I | * Packet Data (DMA) | +<-------+ | | F | | F | | F | * Failed Completions | | | T | | O | | O | | O | * Successful Completions +----------+-----------+ | | | | | | | | ^ | E | +--+--+ +--+--+ +--+--+ | | | | | | v | R | v v v | | +--+-------+-------+--+ PCIe 3.0 x8 +--+--+ | | ^ | Stream Mux | | | | | +----------+----------+ | | | Avalon-St | +-----------------------+
The design uses components from Quartus Platform Design to minimize development and debug time. All FPGA platforms offer some sort of FIFOs and streaming interface that allows merging, so there is little value re-inventing those.
The PCIe adapter is a bug-fix for the V-Series Intel PCIe core where the streaming interface is not correctly defined to be Avalon-ST compliant. See the section about Intel PCIe TLP adapter below for details.
Accesses need to be 4 byte wide.
|0x0000||2||Card||Version||The constant 0x0DE5|
|0x0002||1||Card||Version||Version of the Fejkon card|
|0x0003||1||Card||Port options||Number of ports|
|0x0004||4||Card||Git hash||Git hash of HDL built|
|0x0010||1||Card||Temprature||FPGA Core Temperature (1)|
|0x0020||4||Card||Freq. Gauge||PHY effective clock gauge|
|0x0024||4||Card||Freq. Gauge||PCIe effective clock gauge|
|0x0040||64||Card||FC Dbg & Gen||Inspect / Inject point|
|0x0100||1||Port 0||SFP Status||SFP Status Word (3)|
|0x0140||64||Port 0||SFP Port I2C||SFP I2C core (4)|
|0x02x0||...||Port 1||SFP Port|
|0x03x0||...||Port 2||SFP Port|
|0x04x0||...||Port 3||SFP Port|
|0x0800||1024||Card||PCIe Facility||PCIe counters and status (2)|
|0x8000||2048||Port 0||FC XCVR IP||Fejkon FC XCVR Core (5)|
|0x8800||2048||Port 0||TX XCVR Mgmt||V-Series Transceiver PHY (6)|
|0x9000||64||Port 0||FC Framer||Fibre Channel Framer (7)|
|0x9100||8||Port 0||PCIe CDC FIFO||(Undoc.) fc0_rx_cdc|
|0xFE00||512||Card||XCVR Reconfig||(Undoc.) xcvr_reconfig|
- Details in section below
- Details in section below
- Details in section below
- See "Intel FPGA Avalon I2C (Master) Core" in Embedded Peripherals IP User Guide
- Details in section below
- See "Custom PHY" in V-Series Transceiver PHY IP Core User Guide
- Details in section below
|0x004||4||RX TLP counter|
|0x008||4||RX Unsupported TLP counter|
|0x00C||4||TX Data TLP counter|
|0x010||4||TX Instant TLP counter|
|0x014||4||TX Response TLP counter|
|0x018||4||C2H Staging Packets counter|
|0x020||32||Last RX TLP (8 DWs)|
|0x040||32||Last TX Data TLP (8 DWs)|
|0x060||32||Last TX Instant TLP (8 DWs)|
|0x080||32||Last TX Response TLP (8 DWs)|
|0x0A0||4||C2H DMA buffer start address|
|0x0A4||4||C2H DMA buffer end address|
|0x0A8||4||C2H DMA host read pointer|
|0x0AC||4||C2H DMA card write pointer|
|0x0C0||4||H2C DMA buffer start address|
|0x0C4||4||H2C DMA buffer end address|
|0x0C8||4||H2C DMA card read pointer|
|0x0CC||4||H2C DMA host write pointer|
|0x100||4||Data TX TLP Fill Level|
|0x110||4||Instant TX TLP Fill Level|
|0x120||4||Response TX TLP Fill Level|
|0x180||4||LTSSM and lane active mode|
See Temperature decoding details in FPGA Temperature Sensor IP Core User Guide
|7:0||Read only||A/D conv. value|
|8||Read only||A/D complete|
SFP Port Status
|1||Read only||Loss of Signal|
|2||Read only||TX Fault|
Fejkon FC XCVR Core
|0x00004||4||Last Unknown Coded Set|
|0x00080||128||RX Primitive Counters|
|0x00100||128||TX Primitive Counters|
The primitive counters logged are in order:
The data type is unsigned 32 bit integer for the primitive counters.
|0:3||Sync Status||0xf = fully synced|
|4:7||Pattern detect||0x1 = detected|
|8:11||Error detect||>0 = error(s) detected|
|12:15||Disparity error||>0 = error(s) detected|
|16||PLL Locked||1 = PLL locked|
A fully operational port has status
Note that internally the address space is split up so that the lower half contains registers related to receive and upper half is related to transmit.
|0x004||4||# of ACTIVE state transitions|
|0x008||4||# of FC frames received|
|8||OL3||Wait for OLS|
Note: Only ACTIVE is guaranted to be stable at numeric 0 over time.
FC Debug & Generator
This component is used to generate traffic for debug and development. It generates traffic interleaved with the output of the FC subsystem, and its output is read by both the PCIe and the future Ethernet module.
|0x000||4||Packet inject counter|
|1||RX Data available|
|2||RX Packet dropped|
|3-6||Port 0/1/2/3 SFP I2C|
make syscon to launch Intel's System Console. It will guide you through
the debug commands, but here is an example of reading the SFP data from port 1:
=> Fejkon system console initialized Master is available at $m E.g: - master_write_32 $m 0x000e0000 5 - jtag_debug_reset_system $m - sfp 1 % sfp 1 SFP status: 0x02 SFP identifier: 0x03 SFP ext. identifier: 0x04 SFP connector: 0x07 SFP vendor: 'JDS UNIPHASE ' SFP vendor PN: 'JSM-21S0AA1 ' SFP vendor SN: 'F44939581059 '
The design has been compiled with instrumentation of some key data buses which
you can inspect using
make syscon by loading the
fejkon.sof and using
"Bus Analyzer (Beta)".
If you need to debug a particular component, then using Signal Tap is recommended.
Look at the
pcie syscon command to get more information. If the
My ID row
reads all zeroes that means the host PC has rejected the card for whatever reason.
Known Issues / Notes
The Si570 on board appears to have the following specs:
Part Number: 570FAB000433DG Product: Si570 Description: Differential/single-ended; I2C programmable XO; 10-1417 MHz Frequency A: 100 MHz I2C Address (Hex Format): 0 Format: LVDS Supply Voltage: 2.5 V OE Polarity: OE active high Temperature Stability / Total Stability: 50 ppm / 61.5 ppm Frequency Range: 10 - 810 MHz Operating Temp Range (°C): -40 to +85
Usage under WSL and ChromeOS Crostini
There are some known issues for running under Windows Subsystem for Linux (WSL) and ChromeOS Crostini (external reports).
For WSL, using Ubuntu 18.04 (LTS) seems to work the best and require no workarounds.
realloc(): invalid pointer
This seems to happen on Ubuntu 19.04 and newer, including 20.04 LTS. When starting Quartus or some other tools they will crash with the following error message:
$ ~/intelFPGA/20.1/quartus/bin/quartus realloc(): invalid pointer zsh: abort (core dumped) ~/intelFPGA/20.1/quartus/bin/quartus
This can be worked around by pre-loading the system's udev version. Exact reason why this workaround works is not known.
$ export LD_PRELOAD=/lib/x86_64-linux-gnu/libudev.so.1
This has been reported to Intel.
Macro <protected> is undefined
This is known to happen if you apply the above
LD_PRELOAD fix and then launch ModelSim compilation.
The bug can be triggered on normal machines as well if you accidentally applied the
LD_PRELOAD hack to them.
For some reason ModelSim then fails to decrypt the encrypted device libraries when told to preload a library. Note: It does not have to be udev, this has been known to fail for other preloades e.g. in /etc/ld.so.preload.
# ** Error: ../intelFPGA/20.1/quartus/eda/sim_lib/mentor/stratixv_atoms_ncrypt.v(38): (vlog-2163) Macro `<protected> is undefined. # ** Error: ../intelFPGA/20.1/quartus/eda/sim_lib/mentor/stratixv_atoms_ncrypt.v(38): (vlog-2163) Macro `<protected> is undefined. # ** Error: (vlog-13069) ../intelFPGA/20.1/quartus/eda/sim_lib/mentor/stratixv_atoms_ncrypt.v(38): syntax error in protected region. # # ** Error: ../intelFPGA/20.1/quartus/eda/sim_lib/mentor/stratixv_atoms_ncrypt.v(38): (vlog-13205) Syntax error found in the scope following '<protected>'. Is there a missing '::'? # End time: 23:08:09 on Aug 20,2020, Elapsed time: 0:00:00 # Errors: 5, Warnings: 0
This can be worked around by making sure you do not set
LD_PRELOAD before running
and making sure
/etc/ld.so.preload does not exist.
Intel PCIe TLP adapter
The Avalon-ST interface from the PCIe IP is not standard compliant.
Avalon-ST has a property called
firstSymbolInHighOrderBits which is supposed
to be set to
true when the first symbol is present in e.g.
The PCIe IP for Qsys uses the lower bits for first symbol, but unfortunately
chose to set
empty signal is not compliant either.
These issues are managed by the
intel_pcie_tlp_adapter to make the design and
testbenches being able to use Avalon-ST correctly.
Possible future work
- Integrate the MAX1619 sensor
The MAX1619 is an SMBus temperature sensor supported by the Linux kernel. It would allow for more temperature data. However, SMBus seems to be incompatible with the Intel I2C core, and no replacement core seems to be easily avaiable. This means writing an SMBus controller, QEMU model, Linux and driver for it.
An alternative is to re-use Terasic's NIOS drivers and create an enviromental processor that controls not only the temperature sensor but also the fan. However, this breaks the "keep it simple" methodology currently in use.
- Over-temperature auto-shutdown
The Intel FPGAs do not feature a protective auto-shutdown as Xilinx FPGAs do. It would be useful to enter some kind of low-power mode if an over-temperature condition is detected.
Possibly integrated with the above work.
- Replace Si570 with soft core CPU
Although writing the Si570 controller was useful, in the end it is less reliable and much more expensive, than using a soft core to implement the equivalent logic. Using a soft core like NIOS, RISC-V, or OpenRISC would make it possible to control clock and reset networks from the firmware of the card instead of wiring it up in Verilog. In the beginning I thought this would end up being simpler, and while it ended up being a very good learning experience if I had to do it again I would stick a soft core CPU on there and let it do temperature, fan, reset, and clock control.
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Access to a network may be denied when the modification itself materially and adversely affects the operation of the network or violates the rules and protocols for communication across the network. Corresponding Source conveyed, and Installation Information provided, in accord with this section must be in a format that is publicly documented (and with an implementation available to the public in source code form), and must require no special password or key for unpacking, reading or copying. 7. Additional Terms. "Additional permissions" are terms that supplement the terms of this License by making exceptions from one or more of its conditions. Additional permissions that are applicable to the entire Program shall be treated as though they were included in this License, to the extent that they are valid under applicable law. If additional permissions apply only to part of the Program, that part may be used separately under those permissions, but the entire Program remains governed by this License without regard to the additional permissions. When you convey a copy of a covered work, you may at your option remove any additional permissions from that copy, or from any part of it. (Additional permissions may be written to require their own removal in certain cases when you modify the work.) You may place additional permissions on material, added by you to a covered work, for which you have or can give appropriate copyright permission. Notwithstanding any other provision of this License, for material you add to a covered work, you may (if authorized by the copyright holders of that material) supplement the terms of this License with terms: a) Disclaiming warranty or limiting liability differently from the terms of sections 15 and 16 of this License; or b) Requiring preservation of specified reasonable legal notices or author attributions in that material or in the Appropriate Legal Notices displayed by works containing it; or c) Prohibiting misrepresentation of the origin of that material, or requiring that modified versions of such material be marked in reasonable ways as different from the original version; or d) Limiting the use for publicity purposes of names of licensors or authors of the material; or e) Declining to grant rights under trademark law for use of some trade names, trademarks, or service marks; or f) Requiring indemnification of licensors and authors of that material by anyone who conveys the material (or modified versions of it) with contractual assumptions of liability to the recipient, for any liability that these contractual assumptions directly impose on those licensors and authors. All other non-permissive additional terms are considered "further restrictions" within the meaning of section 10. If the Program as you received it, or any part of it, contains a notice stating that it is governed by this License along with a term that is a further restriction, you may remove that term. If a license document contains a further restriction but permits relicensing or conveying under this License, you may add to a covered work material governed by the terms of that license document, provided that the further restriction does not survive such relicensing or conveying. If you add terms to a covered work in accord with this section, you must place, in the relevant source files, a statement of the additional terms that apply to those files, or a notice indicating where to find the applicable terms. Additional terms, permissive or non-permissive, may be stated in the form of a separately written license, or stated as exceptions; the above requirements apply either way. 8. Termination. You may not propagate or modify a covered work except as expressly provided under this License. Any attempt otherwise to propagate or modify it is void, and will automatically terminate your rights under this License (including any patent licenses granted under the third paragraph of section 11). However, if you cease all violation of this License, then your license from a particular copyright holder is reinstated (a) provisionally, unless and until the copyright holder explicitly and finally terminates your license, and (b) permanently, if the copyright holder fails to notify you of the violation by some reasonable means prior to 60 days after the cessation. Moreover, your license from a particular copyright holder is reinstated permanently if the copyright holder notifies you of the violation by some reasonable means, this is the first time you have received notice of violation of this License (for any work) from that copyright holder, and you cure the violation prior to 30 days after your receipt of the notice. Termination of your rights under this section does not terminate the licenses of parties who have received copies or rights from you under this License. If your rights have been terminated and not permanently reinstated, you do not qualify to receive new licenses for the same material under section 10. 9. Acceptance Not Required for Having Copies. You are not required to accept this License in order to receive or run a copy of the Program. Ancillary propagation of a covered work occurring solely as a consequence of using peer-to-peer transmission to receive a copy likewise does not require acceptance. However, nothing other than this License grants you permission to propagate or modify any covered work. These actions infringe copyright if you do not accept this License. Therefore, by modifying or propagating a covered work, you indicate your acceptance of this License to do so. 10. Automatic Licensing of Downstream Recipients. Each time you convey a covered work, the recipient automatically receives a license from the original licensors, to run, modify and propagate that work, subject to this License. You are not responsible for enforcing compliance by third parties with this License. An "entity transaction" is a transaction transferring control of an organization, or substantially all assets of one, or subdividing an organization, or merging organizations. If propagation of a covered work results from an entity transaction, each party to that transaction who receives a copy of the work also receives whatever licenses to the work the party's predecessor in interest had or could give under the previous paragraph, plus a right to possession of the Corresponding Source of the work from the predecessor in interest, if the predecessor has it or can get it with reasonable efforts. You may not impose any further restrictions on the exercise of the rights granted or affirmed under this License. For example, you may not impose a license fee, royalty, or other charge for exercise of rights granted under this License, and you may not initiate litigation (including a cross-claim or counterclaim in a lawsuit) alleging that any patent claim is infringed by making, using, selling, offering for sale, or importing the Program or any portion of it. 11. Patents. A "contributor" is a copyright holder who authorizes use under this License of the Program or a work on which the Program is based. The work thus licensed is called the contributor's "contributor version". A contributor's "essential patent claims" are all patent claims owned or controlled by the contributor, whether already acquired or hereafter acquired, that would be infringed by some manner, permitted by this License, of making, using, or selling its contributor version, but do not include claims that would be infringed only as a consequence of further modification of the contributor version. For purposes of this definition, "control" includes the right to grant patent sublicenses in a manner consistent with the requirements of this License. Each contributor grants you a non-exclusive, worldwide, royalty-free patent license under the contributor's essential patent claims, to make, use, sell, offer for sale, import and otherwise run, modify and propagate the contents of its contributor version. In the following three paragraphs, a "patent license" is any express agreement or commitment, however denominated, not to enforce a patent (such as an express permission to practice a patent or covenant not to sue for patent infringement). To "grant" such a patent license to a party means to make such an agreement or commitment not to enforce a patent against the party. If you convey a covered work, knowingly relying on a patent license, and the Corresponding Source of the work is not available for anyone to copy, free of charge and under the terms of this License, through a publicly available network server or other readily accessible means, then you must either (1) cause the Corresponding Source to be so available, or (2) arrange to deprive yourself of the benefit of the patent license for this particular work, or (3) arrange, in a manner consistent with the requirements of this License, to extend the patent license to downstream recipients. "Knowingly relying" means you have actual knowledge that, but for the patent license, your conveying the covered work in a country, or your recipient's use of the covered work in a country, would infringe one or more identifiable patents in that country that you have reason to believe are valid. If, pursuant to or in connection with a single transaction or arrangement, you convey, or propagate by procuring conveyance of, a covered work, and grant a patent license to some of the parties receiving the covered work authorizing them to use, propagate, modify or convey a specific copy of the covered work, then the patent license you grant is automatically extended to all recipients of the covered work and works based on it. A patent license is "discriminatory" if it does not include within the scope of its coverage, prohibits the exercise of, or is conditioned on the non-exercise of one or more of the rights that are specifically granted under this License. You may not convey a covered work if you are a party to an arrangement with a third party that is in the business of distributing software, under which you make payment to the third party based on the extent of your activity of conveying the work, and under which the third party grants, to any of the parties who would receive the covered work from you, a discriminatory patent license (a) in connection with copies of the covered work conveyed by you (or copies made from those copies), or (b) primarily for and in connection with specific products or compilations that contain the covered work, unless you entered into that arrangement, or that patent license was granted, prior to 28 March 2007. Nothing in this License shall be construed as excluding or limiting any implied license or other defenses to infringement that may otherwise be available to you under applicable patent law. 12. No Surrender of Others' Freedom. If conditions are imposed on you (whether by court order, agreement or otherwise) that contradict the conditions of this License, they do not excuse you from the conditions of this License. If you cannot convey a covered work so as to satisfy simultaneously your obligations under this License and any other pertinent obligations, then as a consequence you may not convey it at all. For example, if you agree to terms that obligate you to collect a royalty for further conveying from those to whom you convey the Program, the only way you could satisfy both those terms and this License would be to refrain entirely from conveying the Program. 13. Remote Network Interaction; Use with the GNU General Public License. Notwithstanding any other provision of this License, if you modify the Program, your modified version must prominently offer all users interacting with it remotely through a computer network (if your version supports such interaction) an opportunity to receive the Corresponding Source of your version by providing access to the Corresponding Source from a network server at no charge, through some standard or customary means of facilitating copying of software. This Corresponding Source shall include the Corresponding Source for any work covered by version 3 of the GNU General Public License that is incorporated pursuant to the following paragraph. Notwithstanding any other provision of this License, you have permission to link or combine any covered work with a work licensed under version 3 of the GNU General Public License into a single combined work, and to convey the resulting work. The terms of this License will continue to apply to the part which is the covered work, but the work with which it is combined will remain governed by version 3 of the GNU General Public License. 14. Revised Versions of this License. The Free Software Foundation may publish revised and/or new versions of the GNU Affero General Public License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns. Each version is given a distinguishing version number. If the Program specifies that a certain numbered version of the GNU Affero General Public License "or any later version" applies to it, you have the option of following the terms and conditions either of that numbered version or of any later version published by the Free Software Foundation. If the Program does not specify a version number of the GNU Affero General Public License, you may choose any version ever published by the Free Software Foundation. If the Program specifies that a proxy can decide which future versions of the GNU Affero General Public License can be used, that proxy's public statement of acceptance of a version permanently authorizes you to choose that version for the Program. Later license versions may give you additional or different permissions. However, no additional obligations are imposed on any author or copyright holder as a result of your choosing to follow a later version. 15. Disclaimer of Warranty. THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 16. Limitation of Liability. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 17. Interpretation of Sections 15 and 16. If the disclaimer of warranty and limitation of liability provided above cannot be given local legal effect according to their terms, reviewing courts shall apply local law that most closely approximates an absolute waiver of all civil liability in connection with the Program, unless a warranty or assumption of liability accompanies a copy of the Program in return for a fee. END OF TERMS AND CONDITIONS How to Apply These Terms to Your New Programs If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms. To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most effectively state the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found. <one line to give the program's name and a brief idea of what it does.> Copyright (C) <year> <name of author> This program is free software: you can redistribute it and/or modify it under the terms of the GNU Affero General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Affero General Public License for more details. You should have received a copy of the GNU Affero General Public License along with this program. If not, see <https://www.gnu.org/licenses/>. Also add information on how to contact you by electronic and paper mail. If your software can interact with users remotely through a computer network, you should also make sure that it provides a way for users to get its source. For example, if your program is a web application, its interface could display a "Source" link that leads users to an archive of the code. There are many ways you could offer source, and different solutions will be better for different programs; see section 13 for the specific requirements. You should also get your employer (if you work as a programmer) or school, if any, to sign a "copyright disclaimer" for the program, if necessary. For more information on this, and how to apply and follow the GNU AGPL, see <https://www.gnu.org/licenses/>.