bigpulp by drossi
bigPULP
HERO is our open-source, FPGA-based, heterogeneous embedded SoC research platform that combines a fully-modifiable RISC-V manycore accelerator with an ARM Cortex-A host processor.
HERO consists of many different hard- and software components. This repository contains the bigPULP hardware platform, i.e., the sources and build scripts to generate the FPGA bitstream implementing the RISC-V manycore accelerator of HERO.
Being the big brother of the open-source, multicore, Parallel Ultra-Low Power (PULP) computing platform jointly developed by ETH Zurich and the University of Bologna, bigPULP is based on the same cluster architecture and sources. Depending on the target FPGA, bigPULP uses one or multiple PULP clusters that share an L2 instruction and data memory, a global interconnect, synchronization infrastructure, as well as the Remap Address Block (RAB) - a software-managed I/O memory management unit - which allows accelerator to coherently access the platform's main memory including support for shared virtual memory (SVM).
For further information about HERO, refer to our HERO paper at https://arxiv.org/abs/1712.06497 and the HERO website https://www.pulp-platform.org/hero/.
Detailed HOWTOs on how to build and use the HERO platform can be found here:
https://pulp-platform.org/hero/doc/
For more information about the PULP project in general, please refer to the official PULP platform website:
https://www.pulp-platform.org/
Getting Started
Preparation
Before being able to build a bitstream or simulate the FPGA design, get the latest version of the IP cores used inside bigPULP:
./update-ips
This will download all the required IPs, solve dependencies and generate the
scripts by calling ./generate-scripts.
Then, enter the fpga directory and adjust the sourceme.sh script. Select
the target board and adjust the path to the Vivado-specific simulation libraries.
Source the sourceme.sh script:
. sourceme.sh
Generate all the Xilinx IP cores used inside bigPULP:
make ips
Generating the FPGA bitstream
After having downloaded the PULP IP cores, having set up and sourced the
sourceme.sh script and having generated the Xilinx IP cores as shown in the
preparation section, you can start generating an FPGA bitstream. To this end,
enter the fpga directory and execute
make synth-pulp_cluster
to start Xilinx Vivado and synthesize the cluster netlist. Afterwards, run
make synth-pulp_soc
to start Xilinx Vivado and synthesize the SoC containing possibly multiple clusters as well as SoC-level IP cores.
Finally, the top-level design containing the bigPULP SoC and the interfaces
to the host can be generated and an FPGA bitstream can be generated. To this
end, enter the folder bigpulp-z-70xx and run
make clean gui
to start Xilinx Vivado, synthesize the top-level netlist and generate the FPGA bitstream.
NOTE: When targeting other platforms such as the Xilinx Zynq UltraScale+ MPSoC
or the Juno ARM Development Platform, enter the corresponding directory, i.e.,
bigpulp-zux or bigpulp, respectively.
How to create a bootable HERO system image using the generated FPGA bitstream is is shown in a detailed HOWTO at: https://pulp-platform.org/hero/doc/software
Simulating the FPGA design
To debug the bigPULP platform, this repository provides a set of simulation scripts and testbenches.
NOTE: The simulation platform only models the bigPULP subsystem. The host is not part of the simulation. Instead, the host is modeled using an AXI master plug driven by the testbench, and the shared main memory is modeled using Xilinx BRAM IP cores.
After having downloaded the PULP IP cores, having set up the sourceme.sh script
and having generated the Xilinx IP cores as shown in the preparation section, you
need to download the free AMBA4 AXI-Lite Verification IP from SysWip:
http://syswip.com/axi4-lite-verification-ip
and extract the archive.
Then, open the sourceme.sh script and adjust the AXI4LITE_VIP_PATH variable
to point to where you just extracted the archive.
Source the sourceme.sh script:
. sourceme.sh
Next, copy the .slm files, i.e., memory initialization files for the application
of interest, to the folder sim-bigpulp-z-70xx/tb/current/slm_files. These files
are generated by the PULP SDK when compiling an application. They are typically found
inside the build directory build/system-bigpulp*/.
Finally, enter the folder sim-bigpulp-z-70xx/vivado and run
make clean gui
to start Xilinx Vivado, compile the entire design and start the RTL simulation.
NOTE: When targeting other platforms such as the Xilinx Zynq UltraScale+ MPSoC
or the Juno ARM Development Platform, enter the corresponding directory, i.e.,
sim-bigpulp-zux/vivado or sim-bigpulp/vivado, respectively.
bigPULP repository structure
After being fully setup as explained in the Getting Started section, this root repository is structured as follows:
fecontains the front-end RTL code of bigPULP.fe/rtlcontains the main platform RTL code including packages a include files.fe/ipscontains all IPs downloaded byupdate-ipsscript.fpgacontains all FPGA-specific files to build and simulate the RTL code including:fpga/rtl: FPGA-specific RTL code.fpga/ips: Vivado build scripts to generate the Xilinx IP cores instantiated in the design.fpga/pulp_cluster: Vivado build scripts to generate the netlist of the PULP cluster IP instantiated in the design.fpga/pulp_soc: Vivado build scripts to generate the netlist of the bigPULP SoC containing one or multiple PULP clusters as well as SoC-level IPs such as the RAB.fpga/bigpulp-z-70xx: Vivado build scripts and top-level RTL files to generate the bigPULP bitstream and Xilinx SDK files for HERO based on Xilinx Zynq-7000 SoCs.fpga/sim-bigpulp-z-70xx: Vivado scripts and testbenches to simulate bigPULP when targeting Xilinx Zynq-7000 SoCs.fpga/bigpulp-zux: Vivado build scripts and top-level RTL files to generate the bigPULP bitstream, Xilinx SDK and PetaLinux input files for HERO based on Xilinx Zynq UltraScale+ MPSoCs.fpga/sim-bigpulp-zux: Vivado scripts and testbenches to simulate bigPULP when targeting Xilinx Zynq UltraScale+ MPSoCs.fpga/bigpulp: Vivado build scripts and support files to generate the multicluster bigPULP bitstream for HERO based on the ARM Juno Development Platform.fpga/sim-bigpulp: Vivado scripts and testbenches to simulate bigPULP when targeting the ARM Juno Development Platform.
ipstoolscontains the utilities to download and manage the IPs and their dependencies.ips_list.ymlcontains the list of IPs required directly by the platform. Notice that each of them could in turn depend on other IPs, so you will typically find many more IPs in theipsdirectory than are listed in this file.rtl_list.ymlcontains the list of places where local RTL sources are found (e.g.fe/rtl/components).
Requirements
The RTL platform has the following requirements:
- Relatively recent Linux-based operating system; we tested Ubuntu 16.04 and CentOS 7.
- Xilinx Vivado Design Suite version 2017.2.
- ModelSim in reasonably recent version (we tested it with version 10.6b).
- Python 3.4, with the
pyyamlmodule installed (you can get that withpip3 install pyyaml).
Repository organization
The PULP platforms are highly hierarchical and the Git repositories for the various
IPs follow the hierarchy structure to keep maximum flexibility.
Most of the complexity of the IP updating system are hidden behind the
update-ips and generate-scripts Python scripts; however, a few details are
important to know:
- Do not assume that the
masterbranch of an arbitrary IP is stable; many internal IPs could include unstable changes at a certain point of their history. Conversely, in top-level platforms (pulpissimo,pulp,bigPULP) we always use stable versions of the IPs. Therefore, you should be able to use themasterbranch ofbigPULPsafely. - By default, the IPs will be collected from GitHub using HTTPS. This makes it
possible for everyone to clone them without first uploading an SSH key to
GitHub. However, for development it is often easier to use SSH instead,
particularly if you want to push changes back.
To enable this, just replace
https://github.comwithgit@github.comin theipstools_cfg.pyconfiguration file in the root of this repository.
The tools used to collect IPs and create scripts for simulation have many features that are not necessarily intended for the end user, but can be useful for developers; if you want more information, e.g. to integrate your own repository into the flow, you can find documentation at https://github.com/pulp-platform/IPApproX/blob/master/README.md
External contributions
The supported way to provide external contributions is by forking one of our
repositories, applying your patch and submitting a pull request where you
describe your changes in detail, along with motivations.
The pull request will be evaluated and checked with our regression test suite
for possible integration.
If you want to replace our version of an IP with your GitHub fork, just add
group: YOUR_GITHUB_NAMESPACE to its entry in ips_list.yml or
ips/pulp_soc/ips_list.yml.
While we are quite relaxed in terms of coding style, please try to follow these
recommendations:
https://github.com/pulp-platform/ariane/blob/master/CONTRIBUTING.md
Known issues
Currently, the bigPULP platform cannot be built for the Juno ARM Development
Platform from the sources in this repository since part of the required IP cores
and top-level wrappers from ARM are not freely available. For internal development,
download the juno-support repository from the internal GitLab server and
configure JUNO_SUPPORT_PATH in sourceme.sh accordingly.
Support & Questions
For support on any issue related to this platform or any of the IPs, please add an issue to our tracker on https://github.com/pulp-platform/bigPULP/issues
SOLDERPAD HARDWARE LICENSE version 0.51
This license is based closely on the Apache License Version 2.0, but is not
approved or endorsed by the Apache Foundation. A copy of the non-modified
Apache License 2.0 can be found at http://www.apache.org/licenses/LICENSE-2.0.
As this license is not currently OSI or FSF approved, the Licensor permits any
Work licensed under this License, at the option of the Licensee, to be treated
as licensed under the Apache License Version 2.0 (which is so approved).
This License is licensed under the terms of this License and in particular
clause 7 below (Disclaimer of Warranties) applies in relation to its use.
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
1. Definitions.
"License" shall mean the terms and conditions for use, reproduction, and
distribution as defined by Sections 1 through 9 of this document.
"Licensor" shall mean the Rights owner or entity authorized by the Rights owner
that is granting the License.
"Legal Entity" shall mean the union of the acting entity and all other entities
that control, are controlled by, or are under common control with that entity.
For the purposes of this definition, "control" means (i) the power, direct or
indirect, to cause the direction or management of such entity, whether by
contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the
outstanding shares, or (iii) beneficial ownership of such entity.
"You" (or "Your") shall mean an individual or Legal Entity exercising
permissions granted by this License.
"Rights" means copyright and any similar right including design right (whether
registered or unregistered), semiconductor topography (mask) rights and
database rights (but excluding Patents and Trademarks).
"Source" form shall mean the preferred form for making modifications, including
but not limited to source code, net lists, board layouts, CAD files,
documentation source, and configuration files.
"Object" form shall mean any form resulting from mechanical transformation or
translation of a Source form, including but not limited to compiled object
code, generated documentation, the instantiation of a hardware design and
conversions to other media types, including intermediate forms such as
bytecodes, FPGA bitstreams, artwork and semiconductor topographies (mask
works).
"Work" shall mean the work of authorship, whether in Source form or other
Object form, made available under the License, as indicated by a Rights notice
that is included in or attached to the work (an example is provided in the
Appendix below).
"Derivative Works" shall mean any work, whether in Source or Object form, that
is based on (or derived from) the Work and for which the editorial revisions,
annotations, elaborations, or other modifications represent, as a whole, an
original work of authorship. For the purposes of this License, Derivative Works
shall not include works that remain separable from, or merely link (or bind by
name) or physically connect to or interoperate with the interfaces of, the Work
and Derivative Works thereof.
"Contribution" shall mean any design or work of authorship, including the
original version of the Work and any modifications or additions to that Work or
Derivative Works thereof, that is intentionally submitted to Licensor for
inclusion in the Work by the Rights owner or by an individual or Legal Entity
authorized to submit on behalf of the Rights owner. For the purposes of this
definition, "submitted" means any form of electronic, verbal, or written
communication sent to the Licensor or its representatives, including but not
limited to communication on electronic mailing lists, source code control
systems, and issue tracking systems that are managed by, or on behalf of, the
Licensor for the purpose of discussing and improving the Work, but excluding
communication that is conspicuously marked or otherwise designated in writing
by the Rights owner as "Not a Contribution."
"Contributor" shall mean Licensor and any individual or Legal Entity on behalf
of whom a Contribution has been received by Licensor and subsequently
incorporated within the Work.
2. Grant of License. Subject to the terms and conditions of this License, each
Contributor hereby grants to You a perpetual, worldwide, non-exclusive,
no-charge, royalty-free, irrevocable license under the Rights to reproduce,
prepare Derivative Works of, publicly display, publicly perform, sublicense,
and distribute the Work and such Derivative Works in Source or Object form and
do anything in relation to the Work as if the Rights did not exist.
3. Grant of Patent License. Subject to the terms and conditions of this
License, each Contributor hereby grants to You a perpetual, worldwide,
non-exclusive, no-charge, royalty-free, irrevocable (except as stated in this
section) patent license to make, have made, use, offer to sell, sell, import,
and otherwise transfer the Work, where such license applies only to those
patent claims licensable by such Contributor that are necessarily infringed by
their Contribution(s) alone or by combination of their Contribution(s) with the
Work to which such Contribution(s) was submitted. If You institute patent
litigation against any entity (including a cross-claim or counterclaim in a
lawsuit) alleging that the Work or a Contribution incorporated within the Work
constitutes direct or contributory patent infringement, then any patent
licenses granted to You under this License for that Work shall terminate as of
the date such litigation is filed.
4. Redistribution. You may reproduce and distribute copies of the Work or
Derivative Works thereof in any medium, with or without modifications, and in
Source or Object form, provided that You meet the following conditions:
You must give any other recipients of the Work or Derivative Works a copy
of this License; and
You must cause any modified files to carry prominent notices stating that
You changed the files; and
You must retain, in the Source form of any Derivative Works that You
distribute, all copyright, patent, trademark, and attribution notices from
the Source form of the Work, excluding those notices that do not pertain to
any part of the Derivative Works; and
If the Work includes a "NOTICE" text file as part of its distribution, then
any Derivative Works that You distribute must include a readable copy of
the attribution notices contained within such NOTICE file, excluding those
notices that do not pertain to any part of the Derivative Works, in at
least one of the following places: within a NOTICE text file distributed as
part of the Derivative Works; within the Source form or documentation, if
provided along with the Derivative Works; or, within a display generated by
the Derivative Works, if and wherever such third-party notices normally
appear. The contents of the NOTICE file are for informational purposes only
and do not modify the License. You may add Your own attribution notices
within Derivative Works that You distribute, alongside or as an addendum to
the NOTICE text from the Work, provided that such additional attribution
notices cannot be construed as modifying the License. You may add Your own
copyright statement to Your modifications and may provide additional or
different license terms and conditions for use, reproduction, or
distribution of Your modifications, or for any such Derivative Works as a
whole, provided Your use, reproduction, and distribution of the Work
otherwise complies with the conditions stated in this License.
5. Submission of Contributions. Unless You explicitly state otherwise, any
Contribution intentionally submitted for inclusion in the Work by You to the
Licensor shall be under the terms and conditions of this License, without any
additional terms or conditions. Notwithstanding the above, nothing herein shall
supersede or modify the terms of any separate license agreement you may have
executed with Licensor regarding such Contributions.
6. Trademarks. This License does not grant permission to use the trade names,
trademarks, service marks, or product names of the Licensor, except as required
for reasonable and customary use in describing the origin of the Work and
reproducing the content of the NOTICE file.
7. Disclaimer of Warranty. Unless required by applicable law or agreed to in
writing, Licensor provides the Work (and each Contributor provides its
Contributions) on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
KIND, either express or implied, including, without limitation, any warranties
or conditions of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
PARTICULAR PURPOSE. You are solely responsible for determining the
appropriateness of using or redistributing the Work and assume any risks
associated with Your exercise of permissions under this License.
8. Limitation of Liability. In no event and under no legal theory, whether in
tort (including negligence), contract, or otherwise, unless required by
applicable law (such as deliberate and grossly negligent acts) or agreed to in
writing, shall any Contributor be liable to You for damages, including any
direct, indirect, special, incidental, or consequential damages of any
character arising as a result of this License or out of the use or inability to
use the Work (including but not limited to damages for loss of goodwill, work
stoppage, computer failure or malfunction, or any and all other commercial
damages or losses), even if such Contributor has been advised of the
possibility of such damages.
9. Accepting Warranty or Additional Liability. While redistributing the Work or
Derivative Works thereof, You may choose to offer, and charge a fee for,
acceptance of support, warranty, indemnity, or other liability obligations
and/or rights consistent with this License. However, in accepting such
obligations, You may act only on Your own behalf and on Your sole
responsibility, not on behalf of any other Contributor, and only if You agree
to indemnify, defend, and hold each Contributor harmless for any liability
incurred by, or claims asserted against, such Contributor by reason of your
accepting any such warranty or additional liability.
END OF TERMS AND CONDITIONS
Last updated 1 year ago
v1.0.0 released 1 year ago
4 commits by 2 contributors
Activity in last 1 year
Updated 1 month ago