scct by fkuau
Simple Capture/Compare Timer
SCCT is a Simple Capture/Compare Timer written in Verilog. It provides multiple capture/compare channels that use a common counter. Events occurring in the single channels thus can be related to a global time base. SCCT is developed as an IP core that can be attached to the Altera Avalon bus.
More information on SCCT can be found in the related technical report: https://opus.bibliothek.uni-augsburg.de/opus4/frontdoor/index/index/docId/3121
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