TV80 Z80-compatible microprocessor by hutch31

Shadow of OpenCores TV80 microprocessor

TV80 is a Z80-compatible synthesizable Verilog core.

The TV80 core aims to be an area-efficient core which closely mimics the original operation and cycle timing of the Zilog Z80. The core has been used by the author/porter in multiple silicon tape-outs as a utility processor or programmable state machine.

The top level wrapper is the tv80s, which presents a synchronous interface where all signals transition on the positive edge of the clock.

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Project Meta

  • Registered 11 months ago
  • Started 6 years ago
  • Last commit 6 years ago

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{"labels":[2012,2013,2014,2015,2016,2017,2018],"series":[["13",null,null,null,null,null,null]]}

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{"labels":[2012,2013,2014,2015,2016,2017,2018],"series":[["2",null,null,null,null,null,null]]}

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{"labels":["Others","Verilog-SystemVerilog","C\/C++ Header","C","Python","C++","Assembly","make"],"series":[1,27,13,12,11,10,3,3]}

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Project Web Site
https://github.com/hutch31/tv80.git
MIT
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Last updated 11 months ago
Language: Verilog-SystemVerilog
2 forks
1 watcher
1 star
13 commits by 2 contributors
Guy Hutchison Guy Hutchison

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Updated 9 months ago