mor1kx - an OpenRISC processor IP core
The Basics
This repository contains an OpenRISC 1000 compliant processor IP core.
It is written in Verilog HDL.
This repository only contains the IP source code and some documentation. For a verification environment, please see other projects.
Documentation
The documentation is located in the doc/ directory.
It is in asciidoc format, and there's a makefile to build HTML or PDF documentation. To build the HTML documentation, run the following in the doc/ directory:
$ make html
License
This project is licensed under the Open Hardware Description License (OHDL). For details please see the LICENSE file or http://juliusbaxter.net/ohdl/
Configuration
The mor1kx CPU is very configurable to allow you to customize the core to your exact needs. The following tables explain how each parameter can be configured, what the configuration does and why you might want to use it.
Note: The Usage? field below indicates if a certain application (such as running Linux) requires a setting different than the default value.
Basic parameters
Parameter | Description | Default | Values | Usage? |
---|---|---|---|---|
OPTION_OPERAND_WIDTH | Specify the CPU data and address widths | 32 | 32, 64, etc | |
OPTION_CPU0 | Specify the CPU pipeline core | CAPPUCCINO |
CAPPUCCINO ESPRESSO PRONTO_ESPRESSO |
CAPPUCCINO for Linux |
OPTION_RESET_PC | Specify the program counter upon reset | 0x100 |
n |
Caching parameters
Parameter | Description | Default | Values | Usage? |
---|---|---|---|---|
FEATURE_DATACACHE | Enable memory access data caching | NONE |
ENABLED NONE |
|
OPTION_DCACHE_BLOCK_WIDTH | Specify the address width of a cache block | 5 | n |
|
OPTION_DCACHE_SET_WIDTH | Specify the set address width | 9 | n |
|
OPTION_DCACHE_WAYS | Specify the number of blocks per set | 2 | n |
|
OPTION_DCACHE_LIMIT_WIDTH | Specify the maximum address width | 32 | n |
31 for Linux to allow uncached device access |
OPTION_DCACHE_SNOOP | Enable bus snooping for cache coherency | NONE |
ENABLED NONE |
Linux SMP |
FEATURE_INSTRUCTIONCACHE | Enable memory access instruction caching | NONE |
ENABLED NONE |
|
OPTION_ICACHE_BLOCK_WIDTH | Specify the address width of a cache block | 5 | n |
|
OPTION_ICACHE_SET_WIDTH | Specify the set address width | 9 | n |
|
OPTION_ICACHE_WAYS | Specify the number of blocks per set | 2 | n |
|
OPTION_ICACHE_LIMIT_WIDTH | Specify the maximum address width | 32 | n |
Memory Management Unit (MMU) parameters
Parameter | Description | Default | Values | Usage? |
---|---|---|---|---|
FEATURE_DMMU | Enable the data bus MMU | NONE |
ENABLED NONE |
Linux expects ENABLED |
FEATURE_DMMU_HW_TLB_RELOAD | Enable hardware TLB reload | NONE |
ENABLED NONE |
Linux expects NONE |
OPTION_DMMU_SET_WIDTH | Specify the set address width | 6 | n |
|
OPTION_DMMU_WAYS | Specify the number of ways per set | 1 | n |
|
FEATURE_IMMU | Enable the instruction bus MMU | NONE |
ENABLED NONE |
Linux expects ENABLED |
FEATURE_IMMU_HW_TLB_RELOAD | Enable hardware TLB reload | NONE |
ENABLED NONE |
Linux expects NONE |
OPTION_IMMU_SET_WIDTH | Specify the set address width | 6 | n |
|
OPTION_IMMU_WAYS | Specify the number of ways per set | 1 | n |
System bus parameters
Parameter | Description | Default | Values | Usage? |
---|---|---|---|---|
FEATURE_STORE_BUFFER | Enable the load store unit store buffer | ENABLED |
ENABLED NONE |
Large footprint |
OPTION_STORE_BUFFER_DEPTH_WIDTH | Specify the load store unit store buffer depth | 8 | 1-n | |
BUS_IF_TYPE | Specify the bus interface type | WISHBONE32 |
WISHBONE32 |
|
IBUS_WB_TYPE | Specify the Instruction bus interface type option | B3_READ_BURSTING |
B3_READ_BURSTING B3_REGISTERED_FEEDBACK CLASSIC |
|
DBUS_WB_TYPE | Specify the Data bus interface type option | CLASSIC |
B3_READ_BURSTING B3_REGISTERED_FEEDBACK CLASSIC |
Hardware unit configuration parameters
Parameter | Description | Default | Values | Usage? |
---|---|---|---|---|
FEATURE_TRACEPORT_EXEC | Enable the traceport hardware interface | NONE |
ENABLED NONE |
Verilator |
FEATURE_DEBUGUNIT | Enable hardware breakpoints and advanced debug unit interface | NONE |
ENABLED NONE |
OpenOCD |
FEATURE_PERFCOUNTERS | Enable the performance counters unit | NONE |
ENABLED NONE |
|
OPTION_PERFCOUNTERS_NUM | Specify the number of performance counters to generate | 0 | n | |
FEATURE_TIMER | Enable the internal OpenRISC timer | ENABLED |
ENABLED NONE |
|
FEATURE_PIC | Enable the internal OpenRISC PIC | ENABLED |
ENABLED NONE |
|
OPTION_PIC_TRIGGER | Specify the PIC trigger mode | LEVEL |
LEVEL EDGE LATCHED_LEVEL |
|
OPTION_PIC_NMI_WIDTH | Specify non maskable interrupts width, starting at 0, these interrupts will not be reset or maskable | 0 | 0-32 | |
OPTION_RF_CLEAR_ON_INIT | Enable clearing all registers on initialization | 0 | 0, 1 | |
OPTION_RF_NUM_SHADOW_GPR | Specify the number of shadow register files | 0 | 0-16 | Set >=1 for Linux SMP |
OPTION_RF_ADDR_WIDTH | Specify the address width of the register file | 5 | 5 | |
OPTION_RF_WORDS | Specify the number of registers in the register file | 32 | 32 | |
FEATURE_FASTCONTEXTS | Enable fast context switching of register sets | NONE |
ENABLED NONE |
|
FEATURE_MULTICORE | Enable the coreid and numcores SPR registers |
NONE |
ENABLED NONE |
Linux SMP |
FEATURE_FPU | Enable the FPU, for cappuccino pipeline only | NONE |
ENABLED NONE |
|
FEATURE_BRANCH_PREDICTOR | Select the branch predictor implementation | SIMPLE |
SIMPLE GSHARE SAT_COUNTER |
Note: C/C++ float to integer conversion assumes truncation (rounding toward zero
).
lf.ftoi.s
instruction performes such rouning regardless of rounding mode
bits of FPCSR.
All other floating point instructions always perform rounding in according with
rounding mode
bits of FPCSR.
Exception handling options
Parameter | Description | Default | Values | Usage? |
---|---|---|---|---|
FEATURE_DSX | Enable setting the SR[DSX] flag when raising exceptions in a delay slot |
ENABLED |
ENABLED NONE |
|
FEATURE_RANGE | Enable checking and raising range exceptions | ENABLED |
ENABLED NONE |
|
FEATURE_OVERFLOW | Enable checking and raising overflow exceptions | ENABLED |
ENABLED NONE |
ALU configuration options
Parameter | Description | Default | Values | Usage? |
---|---|---|---|---|
FEATURE_MULTIPLIER | Specify the multiplier implementation | THREESTAGE |
THREESTAGE PIPELINED SERIAL SIMULATION NONE |
|
FEATURE_DIVIDER | Specify the divider implementation | SERIAL |
SERIAL SIMULATION NONE |
|
OPTION_SHIFTER | Specify the shifter implementation | BARREL |
BARREL SERIAL |
|
FEATURE_CARRY_FLAG | Enable checking and setting the carry flag | ENABLED |
ENABLED NONE |
Instruction enabling options
Parameter | Description | Default | Values | Usage? |
---|---|---|---|---|
FEATURE_MAC | Enable the l.mac* multiply accumulate instructions |
NONE |
ENABLED NONE |
|
FEATURE_SYSCALL | Enable the 'l.sys` OS syscall instruction | ENABLED |
ENABLED NONE |
|
FEATURE_TRAP | Enable the l.trap instruction |
ENABLED |
ENABLED NONE |
GDB |
FEATURE_ADDC | Enable the l.addc add with carry flag instruction |
ENABLED |
ENABLED NONE |
|
FEATURE_SRA | Enable the l.sra shirt right arithmetic instruction |
ENABLED |
ENABLED NONE |
|
FEATURE_ROR | Enable the l.ror* rotate right instructions |
NONE |
ENABLED NONE |
|
FEATURE_EXT | Enable the l.ext* sign extend instructions |
NONE |
ENABLED NONE |
|
FEATURE_CMOV | Enable the l.cmov conditional move instruction |
ENABLED |
ENABLED NONE |
|
FEATURE_FFL1 | Enable the l.f[fl]1 find first/last set bit instructions |
ENABLED |
ENABLED NONE |
Linux |
FEATURE_ATOMIC | Enable the l.lwa and l.swa atomic instructions |
ENABLED |
ENABLED NONE |
Linux SMP |
FEATURE_CUST1 | Enable the l.cust* custom instruction |
NONE |
ENABLED NONE |
|
FEATURE_CUST2 | Enable the l.cust* custom instruction |
NONE |
ENABLED NONE |
|
FEATURE_CUST3 | Enable the l.cust* custom instruction |
NONE |
ENABLED NONE |
|
FEATURE_CUST4 | Enable the l.cust* custom instruction |
NONE |
ENABLED NONE |
|
FEATURE_CUST5 | Enable the l.cust* custom instruction |
NONE |
ENABLED NONE |
|
FEATURE_CUST6 | Enable the l.cust* custom instruction |
NONE |
ENABLED NONE |
|
FEATURE_CUST7 | Enable the l.cust* custom instruction |
NONE |
ENABLED NONE |
|
FEATURE_CUST8 | Enable the l.cust* custom instruction |
NONE |
ENABLED NONE |
Testing and Continuous Integration
A CPU core cannot be trusted without a full set of verification testing. The mor1kx
pipelines are constantly verified for correctness with the or1k Continuous
Integration (CI) suite running in travis ci. This currently covers:
-
source linting - a
verilator --lint-only
check is run on each commit to ensure there are no code quality issues. -
or1k-tests - the
or1k-tests
test suite is run against each pipeline to check most major instructions, exception handling, caching, timers, interrupts and other features.
The or1k Continuous Integration (CI) suite is running in a librecores-ci-openrisc docker container in Travis CI. Parallel execution of tests runs in librecores-ci-openrisc docker environment.
- librecores-ci-openrisc docker image is based on the standard librecores/librecores-ci docker image and it largely target the FuseSoC use cases.
- The base image includes installation of common EDA tools such as Icarus Verilog, Verilator and Yosys that is required by CI suite for testing. librecores/libreocres-ci-openrisc docker image gets the toolchain required, downloads and compiles the or1k-tests.
The Continous Integration suite also runs in Jenkins supported by Librecores-CI. As similar to Travis, mor1kx
pipelines are also constantly verified. In addition to that, it also supports:
- Yosys synthesis for monitoring resource usages. Fusesoc provides the icestorm backend.
- LibreCores CI Docker image provides Yosys synthesis metrics parser which outputs 'Printing Statistics'. Results are parsed to graphs with Performance Plugin, which can be seen at ci.librecores.org
In the future we are working on bringing more tests including:
- softfloat, fpu verification (may not be feasable in CI due to long run times)
- CPU pipeline debugging verification via GDB/OpenOCD
- Resource utilization regression with yosys synth_intel synth_xilinx
- Formal verification with yosys
- Verification that each revision can boot differnt OS's Linux, RTMES
- Golden reference
or1ksim
trace comparisons vs verilog model using constrained random inputs.
Verification status of mor1kx pipelines:
Pipeline | Testing Support | Comments |
---|---|---|
CAPPUCCINO |
Linting or1k-tests |
All supported tests passing |
ESPRESSO |
linting or1k-tests |
Still many pipeline failures, see issue #71 |
PRONTO_ESPRESSO |
linting |
No toolchain support for no-delayslot c code |
MAROCCHINO |
linting or1k-tests |
See marocchino project. |
Open Hardware Description License Version 1.0 (Based on the MPL 2.0 RC2) ======================================================== 1. Definitions -------------- 1.1. "Contributor" means each individual or legal entity that creates, contributes to the creation of, or owns a Covered Hardware Description. 1.2. "Contributor Version" means the combination of the Contributions of others (if any) used by a Contributor and that particular Contributor's Contribution. 1.3. "Contribution" means Covered Hardware Description of a particular Contributor. 1.4. "Covered Hardware Description" means Source Code Form to which the initial Contributor has attached the notice in Exhibit A, the Processed Form of such Source Code Form, and Modifications of such Source Code Form, in each case including portions thereof. 1.5. "Incompatible With Secondary Licenses" means that the initial Contributor has attached the notice described in Exhibit B to the Covered Hardware Description 1.6. "Processed Form" means any form of the work other than Source Code Form. 1.7. "Larger Work" means a work that combines a Covered Hardware Description with code in a separate file or files not governed by the terms of this License. 1.8. "License" means this document. 1.9. "Licensable" means having the right to grant, to the maximum extent possible, whether at the time of the initial grant or subsequently, any and all of the rights conveyed by this License. 1.10. "Modifications" means any of the following: (a) any file in Source Code Form that results from an addition to, deletion from, or modification of the contents of a Covered Hardware Description; or (b) any new file in Source Code Form that contains any Covered Hardware Description Source. 1.11. "Patent Claims" of a Contributor means any patent claim(s), including without limitation, method, process, and apparatus claims, in any patent Licensable by such Contributor that would be infringed, but for the grant of the License, by the making, using, selling, offering for sale, having made, import, or transfer of either its Contributions or its Contributor Version. 1.12. "Secondary License" means either the GNU General Public License, Version 2.0 or later, the GNU Lesser General Public License, Version 2.1 or later, or the GNU Affero General Public License, Version 3.0 or later, or the TAPR Open Hardware License, Version 1.0 or later, or the CERN OHL, Verstion 1.1 or later. 1.13. "Source Code Form" means the form of the work preferred for making modifications. 1.14. "You" (or "Your") means an individual or a legal entity exercising rights under this License. For legal entities, "You" includes any entity that controls, is controlled by, or is under common control with You. For purposes of this definition, "control" means (a) the power, direct or indirect, to cause the direction or management of such entity, whether by contract or otherwise, or (b) ownership of more than fifty percent (50%) of the outstanding shares or beneficial ownership of such entity. 2. License Grants and Conditions -------------------------------- 2.1. Grants Each Contributor hereby grants You a world-wide, royalty-free, non-exclusive license: (a) under intellectual property rights (other than patent or trademark) Licensable by such Contributor to use, reproduce, make available, modify, display, perform, distribute, and otherwise exploit its Contributions, either on an unmodified basis, with Modifications, or as part of a Larger Work; and (b) under Patent Claims of such Contributor to make, use, sell, offer for sale, have made, import, and otherwise transfer either its Contributions or its Contributor Version. 2.2. Effective Date The licenses granted in Section 2.1 with respect to any Contribution become effective for each Contribution on the date the Contributor first distributes such Contribution. 2.3. Limitations on Grant Scope The licenses granted in this Section 2 are the only rights granted under this License. No additional rights or licenses will be implied from the distribution or licensing of Covered Hardware Description under this License. Notwithstanding Section 2.1(b) above, no patent license is granted by a Contributor: (a) for any code that a Contributor has removed from Covered Hardware Description; or (b) for infringements caused by: (i) Your and any other third party's modifications of a Covered Hardware Description, or (ii) the combination of its Contributions with other Source (except as part of its Contributor Version); or (c) under Patent Claims infringed by a Covered Hardware Description in the absence of its Contributions. This License does not grant any rights in the trademarks, service marks, or logos of any Contributor (except as may be necessary to comply with the notice requirements in Section 3.4). 2.4. Subsequent Licenses No Contributor makes additional grants as a result of Your choice to distribute the Covered Hardware Description under a subsequent version of this License (see Section 10.2) or under the terms of a Secondary License (if permitted under the terms of Section 3.3). 2.5. Representation Each Contributor represents that the Contributor believes its Contributions are its original creation(s) or it has sufficient rights to grant the rights to its Contributions conveyed by this License. 2.6. Fair Use This License is not intended to limit any rights You have under applicable copyright doctrines of fair use, fair dealing, or other equivalents. 2.7. Conditions Sections 3.1, 3.2, 3.3, and 3.4 are conditions of the licenses granted in Section 2.1. 3. Responsibilities ------------------- 3.1. Distribution of Source Form All distribution of Covered Hardware Description in Source Code Form, including any Modifications that You create or to which You contribute, must be under the terms of this License. You must inform recipients that the Source Code Form of the Covered Hardware Description is governed by the terms of this License, and how they can obtain a copy of this License. You may not attempt to alter or restrict the recipients' rights in the Source Code Form. 3.2. Distribution of Processed Form If You distribute Covered Hardware Description in Processed Form then: (a) such Covered Hardware Description must also be made available in Source Code Form, as described in Section 3.1, and You must inform recipients of the Processed Form how they can obtain a copy of such Source Code Form by reasonable means in a timely manner, at a charge no more than the cost of distribution to the recipient; and (b) You may distribute such Processed Form under the terms of this License, or sublicense it under different terms, provided that the license for the Processed Form does not attempt to limit or alter the recipients' rights in the Source Code Form under this License. 3.3. Distribution of a Larger Work You may create and distribute a Larger Work under terms of Your choice, provided that You also comply with the requirements of this License for the Covered Hardware Description. If the Larger Work is a combination of a Covered Hardware Description with a work governed by a Secondary License, and the Covered Hardware Description is not Incompatible With Secondary Licenses, this License permits You to additionally distribute such Covered Hardware Description under the terms of that Secondary License, so that the recipient of the Larger Work may, at their option, further distribute the Covered Hardware Description under the terms of either this License or that Secondary License. 3.4. Notices You may not remove or alter the substance of any license notices (including copyright notices, patent notices, disclaimers of warranty, or limitations of liability) contained within the Source Code Form of the Covered Hardware Description, except that You may alter any license notices to the extent required to remedy known factual inaccuracies. 3.5. Application of Additional Terms You may choose to offer, and to charge a fee for, warranty, support, indemnity or liability obligations to one or more recipients of a Covered Hardware Description. However, You may do so only on Your own behalf, and not on behalf of any Contributor. You must make it absolutely clear that any such warranty, support, indemnity, or liability obligation is offered by You alone, and You hereby agree to indemnify every Contributor for any liability incurred by such Contributor as a result of warranty, support, indemnity or liability terms You offer. You may include additional disclaimers of warranty and limitations of liability specific to any jurisdiction. 4. Inability to Comply Due to Statute or Regulation --------------------------------------------------- If it is impossible for You to comply with any of the terms of this License with respect to some or all of the Covered Hardware Description due to statute, judicial order, or regulation then You must: (a) comply with the terms of this License to the maximum extent possible; and (b) describe the limitations and the code they affect. Such description must be placed in a text file included with all distributions of the Covered Hardware Description under this License. Except to the extent prohibited by statute or regulation, such description must be sufficiently detailed for a recipient of ordinary skill to be able to understand it. 5. Termination -------------- 5.1. The rights granted under this License will terminate automatically if You fail to comply with any of its terms. However, if You become compliant, then the rights granted under this License from a particular Contributor are reinstated (a) provisionally, unless and until such Contributor explicitly and finally terminates Your grants, and (b) on an ongoing basis, if such Contributor fails to notify You of the non-compliance by some reasonable means prior to 60 days after You have come back into compliance. Moreover, Your grants from a particular Contributor are reinstated on an ongoing basis if such Contributor notifies You of the non-compliance by some reasonable means, this is the first time You have received notice of non-compliance with this License from such Contributor, and You become compliant prior to 30 days after Your receipt of the notice. 5.2. If You initiate litigation against any entity by asserting a patent infringement claim (excluding declaratory judgment actions, counter-claims, and cross-claims) alleging that a Contributor Version directly or indirectly infringes any patent, then the rights granted to You by any and all Contributors for the Covered Hardware Description under Section 2.1 of this License shall terminate. 5.3. In the event of termination under Sections 5.1 or 5.2 above, all end user license agreements (excluding distributors and resellers) which have been validly granted by You or Your distributors under this License prior to termination shall survive termination. ************************************************************************ * * * 6. Disclaimer of Warranty * * ------------------------- * * * * The Covered Hardware Description is provided under this License on * * an "as is" basis, without warranty of any kind, either expressed, * * implied, or statutory, including, without limitation, warranties * * that the Covered Hardware Description is free of defects, * * merchantable, fit for a particular purpose or non-infringing. The * * entire risk as to the quality and performance of the Covered * * Hardware Description is with You. Should any Covered Hardware * * Description prove defective in any respect, You (not any * * Contributor) assume the cost of any necessary servicing, repair, or * * correction. This disclaimer of warranty constitutes an essential * * part of this License. No use of any Covered Hardware Description is * * authorized under this License except under this disclaimer. * * * ************************************************************************ ************************************************************************ * * * 7. Limitation of Liability * * -------------------------- * * * * Under no circumstances and under no legal theory, whether tort * * (including negligence), contract, or otherwise, shall any * * Contributor, or anyone who distributes Covered Hardware Description * * as permitted above, be liable to You for any direct, indirect, * * special, incidental, or consequential damages of any character * * including, without limitation, damages for lost profits, loss of * * goodwill, work stoppage, computer failure or malfunction, or any * * and all other commercial damages or losses, even if such party * * shall have been informed of the possibility of such damages. This * * limitation of liability shall not apply to liability for death or * * personal injury resulting from such party's negligence to the * * extent applicable law prohibits such limitation. Some * * jurisdictions do not allow the exclusion or limitation of * * incidental or consequential damages, so this exclusion and * * limitation may not apply to You. * * * ************************************************************************ 8. Litigation ------------- Any litigation relating to this License may be brought only in the courts of a jurisdiction where the defendant maintains its principal place of business and such litigation shall be governed by laws of that jurisdiction, without reference to its conflict-of-law provisions. Nothing in this Section shall prevent a party's ability to bring cross-claims or counter-claims. 9. Miscellaneous ---------------- This License represents the complete agreement concerning the subject matter hereof. If any provision of this License is held to be unenforceable, such provision shall be reformed only to the extent necessary to make it enforceable. Any law or regulation which provides that the language of a contract shall be construed against the drafter shall not be used to construe this License against a Contributor. 10. Versions of the License --------------------------- 10.1. New Versions Julius Baxter is the license steward. Except as provided in Section 10.3, no one other than the license steward has the right to modify or publish new versions of this License. Each version will be given a distinguishing version number. 10.2. Effect of New Versions You may distribute the Covered Hardware Description under the terms of the version of the License under which You originally received the Covered Hardware Description, or under the terms of any subsequent version published by the license steward. 10.3. Modified Versions If you create designs not governed by this License, and you want to create a new license for such designs, you may create and use a modified version of this License if you rename the license and remove any references to the name of the license steward (except to note that such modified license differs from this License). 10.4. Distributing Source Code Form that is Incompatible With Secondary Licenses If You choose to distribute Source Code Form that is Incompatible With Secondary Licenses under the terms of this version of the License, the notice described in Exhibit B of this License must be attached. Exhibit A - Source Code Form License Notice ------------------------------------------- This Source Code Form is subject to the terms of the Open Hardware Description License, v. 1.0. If a copy of the OHDL was not distributed with this file, You can obtain one at http://juliusbaxter.net/ohdl/ohdl.txt If it is not possible or desirable to put the notice in a particular file, then You may include the notice in a location (such as a LICENSE file in a relevant directory) where a recipient would be likely to look for such a notice. You may add additional accurate notices of copyright ownership. Exhibit B - "Incompatible With Secondary Licenses" Notice --------------------------------------------------------- This Source Code Form is "Incompatible With Secondary Licenses", as defined by the Open Hardware Description License, v. 1.0.
https://github.com/openrisc/mor1kx
OHDL 1.0
Issue Tracker
Last activity 5 months ago
v5.0-r2 released 2 years ago
Primary language: Verilog-SystemVerilog
17 open issues
6 open pull requests
111 forks
58 watchers
311 stars
706 commits by 23 contributors
activity over the last year
LibreCores data updated 4 months ago