Planet LibreCores
Version 3.10.0 released
by Esko Pekkarinen on Kactus2: NewsDemocratizing Chiplet-Based Processor Design | Ventana Micro Systems
by RISC-V Community News on Blog Archives - RISC-V InternationalRISC-V Vector Processing is Taking Off | SiFive
by RISC-V Community News on Blog Archives - RISC-V InternationalGreenWaves will Demonstrate Live the Ground-breaking AI and DSP Demos on its Ultra Low Power Chip at Embedded World 2022 | GreenWaves Technologies
by RISC-V Community News on Blog Archives - RISC-V InternationalOvertake the Competition in Automotive Design with RISC-V Innovations | Codasip
by RISC-V Community News on Blog Archives - RISC-V InternationalRISC-V Announces First New Specifications of 2022, Adding to 16 Ratified in 2021 | RISC-V International
by RISC-V Community News on Announcements Archives - RISC-V InternationalRenode 1.13 for improved machine learning and pre-silicon development | Antmicro
by RISC-V Community News on Blog Archives - RISC-V InternationalThermal (IR) Imaging Pipeline (ISP) Core on PolarFire® SoC FPGA SoM | Microchip
by RISC-V Community News on Blog Archives - RISC-V InternationalFirst Analog/Mixed Signal Project Results
by Fatsie on Chips4Makers.ioXuanTie C906 Tops MLPerf Tiny v0.7 Benchmark | MengChang, Alibaba Cloud
by RISC-V Community News on Blog Archives - RISC-V InternationalEl Correo Libre Issue 51
by FOSSi Foundation on FOSSi Foundation - News & PostsPyVSC: Working with Coverage Data
by Matthew Ballance on Bits, Bytes, and GatesLibreCellular Project Update
by Andrew Back on MyriadRFWhy MIPS is Betting Big on RISC-V: Q&A with RISC-V International and MIPS | MIPS
by RISC-V Community News on Blog Archives - RISC-V InternationalRISC-V Summit China 2022 Call for Talks is Now Open
by RISC-V Community News on Blog Archives - RISC-V InternationallowRISC Acquires NewAE Technology, Adding Advanced Security Analysis Tools to the OpenTitan Platform
by lowRISC on lowRISC: Collaborative open silicon engineeringOTA: Stratospheric LimeSDRs, Automated Transcriptions, LimeSDR Mini 2 Launch, and More
by Gareth Halfacree on MyriadRFIntroduction To The SiFive Intelligence X280
by Andy Frame on SiFiveSiFive - The Market Leader In RISC-V Vectors
by Andy Frame on SiFive10 Important Things To Know About SiFive Vectors
by Andy Frame on SiFiveThe Investment Heard Around The World
by Chris Jones on SiFiveBeginners Guide To RISC-V Vector Processing
by on SiFiveSimplifying the Vehicle to Anything (V2X) Journey: Porting of Jamaica VM on PolarFire® SoC Icicle Kit | Leah Iris, Microchip
by RISC-V Community News on Blog Archives - RISC-V InternationalMIPS Pivots to RISC-V with Best-In-Class Performance and Scalability | MIPS
by RISC-V Community News on Blog Archives - RISC-V InternationalEl Correo Libre Issue 50
by FOSSi Foundation on FOSSi Foundation - News & PostsOTA: LiteX SoC on the LimeSDR Mini 2.0, DMR on the LimeNET Micro, M17 on LimeSDR, and More
by Gareth Halfacree on MyriadRFE4 Computer Engineering joins RISC-V International | E4 Computer Engineering
by RISC-V Community News on Blog Archives - RISC-V InternationalRISC-V Open Era of Computing – A Conversation with Calista Redmond and Mr. Sivakumar P R , Founder and CEO of Maven Silicon | Maven Silicon
by Maven Silicon on Blog Archives - RISC-V InternationalJoin us in the classroom! Put RISC-V into your Computer Architecture course using RVfpga! | Robert C.W. Owen, Imagination Technologies
by RISC-V Community News on Blog Archives - RISC-V InternationalAlibaba Cloud Tops MLPerf Tiny v0.7 Benchmark | Alibaba Cloud
by RISC-V Community News on Blog Archives - RISC-V InternationalXuantie IOMMU from T-Head for RISC-V | Chong Ren, Alibaba Cloud
by RISC-V Community News on Blog Archives - RISC-V InternationalEl Correo Libre Issue 49
by FOSSi Foundation on FOSSi Foundation - News & PostsApply Now For GSoC 2022!
by FOSSi Foundation on FOSSi Foundation - News & PostsMi-V Ecosystem Partner Solutions | Leah Iris, Microchip
by RISC-V Community News on Blog Archives - RISC-V InternationalXuanTie VirtualZone: RISC-V-based Security Extensions | Xuan Jian, Alibaba Cloud
by RISC-V Community News on Blog Archives - RISC-V InternationalTbLink-RPC: Simplifying the Multi-Language Testbench
by Matthew Ballance on Bits, Bytes, and GatesEfabless’ CLEAR, a Fully-Open RISC-V ASIC Built on chipIgnite, Nears its Goal with Days to Go
by Gareth Halfacree on FOSSi Archives - AB OpenOTA: LimeSDR Mini 2.0, Project CAMARA, a Commercial LimeNET Base Station Call, and More
by Gareth Halfacree on MyriadRFRISC-V RV32I JALR Instruction | Maven Silicon
by Maven Silicon on Blog Archives - RISC-V InternationalTen Reasons to use SiliconCompiler – Including SPDX Provenance Support
by Gareth Halfacree on FOSSi Archives - AB OpenEl Correo Libre Issue 48
by FOSSi Foundation on FOSSi Foundation - News & PostsOTA: ADS-B Tracking at the Terminal, Open RAN Silicon, Beginner’s Guides, and More
by Gareth Halfacree on MyriadRFOpenRISC support added to GLIBC 2.35
by OpenRISC Community on OpenRISCFOSSi Explosion 2021 | Olof Kindgren, FOSSi Foundation and Qamcom
by Olof Kindgren on Blog Archives - RISC-V InternationalFOSSi Explosion 2021
by Olof Kindgren on Tales from Beyond the Register MapEl Correo Libre Issue 47
by Gareth Halfacree on LibreCores - MediumRISC-V is Ready for Great Challenges
by Chris Jones on SiFiveIntel Corporation Makes Deep Investment in RISC-V Community to Accelerate Innovation in Open Computing
by Kim McMahon on Announcements Archives - RISC-V InternationalRISC-V RV32I J-Type | Maven Silicon
by Maven Silicon on Blog Archives - RISC-V InternationalSemico Research’s New Report Predicts There Will Be 25 Billion RISC-V-Based AI SoCs By 2027 | Rich Wawrzyniak, Semico Research Corporation
by RISC-V Community News on Blog Archives - RISC-V InternationalOpen source FPGA platform for Rowhammer security testing in the data center | Antmicro
by Antmicro on Blog Archives - RISC-V InternationalOTA: X-Band Beams Images from Space, SDR-based Malware Detection, srsRAN Tutorial, and More
by Gareth Halfacree on MyriadRFAlibaba Cloud Opens Up IoT Technology Development Platform | Wang Cindy, Alibaba Cloud
by RISC-V Community News on Blog Archives - RISC-V InternationalDocumenting SystemVerilog with Sphinx
by Matthew Ballance on Bits, Bytes, and GatesGoogle Research Releases Circuit Training, an Open-Source Framework for Automated Chip Floorplanning
by Gareth Halfacree on FOSSi Archives - AB OpenThe Rapid Rise of RISC‑V
by Jack Kang on SiFiveRISC-V RV32I S-Type | Maven Silicon
by Maven Silicon on Blog Archives - RISC-V InternationalEl Correo Libre Issue 46
by Gareth Halfacree on LibreCores - MediumEdalize 0.3.0
by Olof Kindgren on Tales from Beyond the Register MapWhat's happing in the open silicon ecosystem around you? Planet LibreCores helps you to get the latest news from all corners of the community by aggregating blog posts.
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Last updated 26 June 2022 13:30 UTC