LibreCores Project List
optimsoc/optimsoc
OpTiMSoC is a framework to build a custom tiled Multi-Core SoC
by optimsoc (added on 2016-10-08)
imphil/pulpino
by imphil (added on 2016-10-08)
rherveille/ahb3lite-interconnect
Fully parameterised AHB3-Multilayer Interconnect switch for AHB3-Lite based SoCs.
by rherveille (added on 2016-10-10)
imphil/glip
Simple FIFO-based, transport-agnostic device - host communication
by imphil (added on 2016-10-10)
eliaskousk/parallella-riscv
RISC-V port to Parallella Board
by eliaskousk (added on 2016-10-11)
olofk/FuseSoC
a package manager and a set of build tools for FPGA/ASIC development
by olofk (added on 2016-10-11)
sridhargunnam/mipsR3000
by sridhargunnam (added on 2016-10-11)
ZipCPU/zipcpu
The ZipCPU is a resource efficient 32-bit soft core implementation.
by ZipCPU (added on 2016-10-12)
ZipCPU/wbscope
A wishbone controlled scope for FPGAs
by ZipCPU (added on 2016-10-12)
ZipCPU/wbicapetwo
Wishbone to ICAPE interface bridge
by ZipCPU (added on 2016-10-12)
ZipCPU/wb2axip
A pipelined wishbone to AXI bridge
by ZipCPU (added on 2016-10-12)
ZipCPU/wbfmtx
A wishbone controlled FM transmitted hack
by ZipCPU (added on 2016-10-12)
ZipCPU/wbpwmaudio
A wishbone controlled PWM (audio) controller
by ZipCPU (added on 2016-10-12)
ZipCPU/dblclockfft
A C++ generator of Verilog FFT cores that produce and consume two samples per clock
by ZipCPU (added on 2016-10-12)
ZipCPU/rtcclock
A Real Time Clock core for FPGA's
by ZipCPU (added on 2016-10-12)
ZipCPU/sdspi
SD-Card controller, using a SPI interface that is (optionally) shared
by ZipCPU (added on 2016-10-12)
ZipCPU/s6soc
CMod-S6 SoC
by ZipCPU (added on 2016-10-12)
ZipCPU/wbuart32
A simple UART controller that can easily be wishbone controlled.
by ZipCPU (added on 2016-10-12)
ZipCPU/xulalx25soc
A System on a Chip Implementation for the XuLA2-LX25 board
by ZipCPU (added on 2016-10-12)
ZipCPU/openarty
An Open Source configuration of the Arty platform
by ZipCPU (added on 2016-10-12)
taichi-ishitani/rggen
Code generation tool for control/status registers in a SoC design
by taichi-ishitani (added on 2016-10-14)
cliffordwolf/picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
by cliffordwolf (added on 2016-10-14)
cliffordwolf/SimpleVOut
SimpleVOut -- A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
by cliffordwolf (added on 2016-10-14)
olivier-girard/openmsp430
by olivier-girard (added on 2016-10-15)
olivier-girard/opengfx430
by olivier-girard (added on 2016-10-15)
olofk/wb-streamer
Streaming DMA with Wishbone interface
by olofk (added on 2016-10-16)
olofk/fifo
Generic FIFO implementation with optional FWFT
by olofk (added on 2016-10-16)
olofk/stream-utils
Data stream utility functions
by olofk (added on 2016-10-16)
olofk/wb-intercon
Wishbone interconnect utilities
by olofk (added on 2016-10-16)
olofk/wb-bfm
Wishbone Bus Functional Model
by olofk (added on 2016-10-16)
olofk/or1k-bootloaders
OpenRISC 1000-compatible bootloaders
by olofk (added on 2016-10-16)
olofk/ipyxact
Python library for working with IP-XACT files
by olofk (added on 2016-10-16)
olofk/libaxis
Library of VHDL components for AXI Stream infrastructure
by olofk (added on 2016-10-16)
olofk/libstorage
Library of VHDL components for data storage
by olofk (added on 2016-10-16)
fkuau/scct
Simple Capture/Compare Timer
by fkuau (added on 2016-10-19)
Paebbels/PicoBlaze-Library
The PicoBlaze-Library offers several PicoBlaze devices and routines to extend a common PicoBlaze environment to a little System on Chip.
by Paebbels (added on 2016-10-24)
Paebbels/JSON-for-VHDL
A JSON library implemented in VHDL
by Paebbels (added on 2016-10-24)
Paebbels/PicoBlaze-Examples
This repository contains synthesizable examples which use the PoC-Library.
by Paebbels (added on 2016-10-24)
Paebbels/Pile-of-Cores
IP Core Library - Published and maintained by the VLSI-EDA, Faculty of Computer Science, Technische Universität Dresden, Germany.
by Paebbels (added on 2016-10-24)
krevanth/ZAP-ARM-Processor
ZAP is an ARMv4T processor with cache and MMU support.
by krevanth (added on 2016-11-04)
epekkar/kactus2
by epekkar (added on 2016-12-20)
openrisc/mor1kx
The new reference OpenRISC 1000 implementation
by openrisc (added on 2017-02-06)
arkenidar/resm-aka-bbjj
Computer/CPU design.Based on Turing Machine/BitBitJump machine.Extended,popularized,applied.Files,ideas,docs,programs,circuits,links.
by arkenidar (added on 2017-02-09)
zerogravity/neo430
very small, msp430-compatible custom soft-core microcontroller-like processor system
by zerogravity (added on 2017-02-14)
TNSFloat/Ternary-FFT
by TNSFloat (added on 2017-03-27)
enjoy-digital/liteeth
Small footprint and configurable Ethernet core
by enjoy-digital (added on 2017-05-14)
enjoy-digital/litesata
Small footprint and configurable SATA core
by enjoy-digital (added on 2017-05-14)
enjoy-digital/litedram
Small footprint and configurable DRAM core
by enjoy-digital (added on 2017-05-14)
enjoy-digital/litepcie
Small footprint and configurable PCIe core
by enjoy-digital (added on 2017-05-14)
enjoy-digital/litejesd204b
Small footprint and configurable JESD204B core
by enjoy-digital (added on 2017-05-14)
enjoy-digital/litescope
Small footprint and configurable embedded FPGA logic analyzer
by enjoy-digital (added on 2017-05-14)
fossi-foundation/wishbone
The Wishbone SoC Interconnect Architecture
by fossi-foundation (added on 2017-05-22)
AndreaCorallo/kpu-soc
A minimal system on chip
by AndreaCorallo (added on 2017-06-02)
zguig52/euryspace
Space Communication System based on CCSDS recommandations
by zguig52 (added on 2017-06-16)