mipsR3000 by sridhargunnam

mipsR3000

use make file to run

You might need genesis files to compile the codes. If you need them please contact me. sridhargunnam@gmail.com

You will also need synopsis vcs licence for RTL systhesis

To run

make run MODULE_NAME=mipsCore

Project Meta

  • Registered on LibreCores 5 years ago
  • Project started 5 years ago
  • Last commit 5 years ago

Commits

{"labels":[2016,2017,2018,2019,2020,2021,2022],"series":[[4,1,0,0,0,0,0]]}

Commits per year

Contributors

{"labels":[2016,2017,2018,2019,2020,2021,2022],"series":[[1,1,0,0,0,0,0]]}

Unique contributors per year

Releases

Data not available

Languages

{"labels":["Others","Verilog-SystemVerilog","Markdown"],"series":[0,6,1]}

Share of languages used

Data Sheet
https://github.com/sridhargunnam/mipsR3000
Last activity 5 years ago
Primary language: Verilog-SystemVerilog
5 commits by 1 contributor
sridhargunnam

activity over the last year

LibreCores data updated 1 year ago